Publications

• Achieving Uniform Performance and Maximizing Throughput in the Presence of Heterogeneity
Krishna K. Rangan, Michael D. Powell, Gu-Yeon Wei, and David Brooks
In Proceedings of the 17th International Symposium on High Performance Computer Architecture (HPCA 2011), February 2011



• Architectural Core Salvaging in a Multi-Core Processor for Hard-Error Tolerance
Michael D. Powell, Arijit Biswas, Shantanu Gupta, and Shubhendu S. Mukherjee
In Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), June 2009, pp 93--104



• CAMP: A Technique to Estimate Per-Structure Power at Run-time using a Few Simple Parameters
Michael D. Powell, Arijit Biswas, Joel S. Emer, Shubhendu S. Mukherjee, Basit R. Sheikh, and Shrirang Yardi
In Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA 15), February 2009



• Resource Area Dilation to Reduce Power Density in Throughput Servers
Michael D. Powell and T. N. Vijaykumar
International Symposium on Low Power Electronics and Design (ISLPED), August 2007



• Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines
Michael D. Powell, Ethan Schuchman, and T. N. Vijaykumar
38th International Symposium on Microarchitecture (MICRO), December 2005



• Optimizing Replication, Communication, and Capacity Allocation in CMPs
Zeshan Chishti, Michael D. Powell, and T. N. Vijaykumar
32nd International Symposium on Computer Architecture (ISCA), June 2005



• Heat-and-Run: Leveraging SMT and CMP to Manage Power Density Through the Operating System
Michael D. Powell, Mohamed Gomaa, and T. N. Vijaykumar
11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2004



• Exploiting Resonant Behavior to Reduce Inductive Noise
Michael D. Powell and T. N. Vijaykumar
31st International Symposium on Computer Architecture (ISCA 31), June 2004



• Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures
Zeshan Chishti, Michael D. Powell, and T. N. Vijaykumar
36th International Symposium on Microarchitecture (MICRO 36), December 2003



• Pipeline Muffling and A Priori Current Ramping: Architectural Techniques to Reduce High-Frequency Inductive Noise
Michael D. Powell and T. N. Vijaykumar
International Symposium on Low Power Electronics and Design (ISLPED), August 2003



• Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage
Michael D. Powell and T. N. Vijaykumar
30th Annual International Symposium on Computer Architecture (ISCA 30), June 2003



• Reducing Register Ports for Higher Speed and Lower Energy
Il Park, Michael D. Powell, and T. N. Vijaykumar
In Proceedings of the 35th Annual International Symposium on Microarchitecture (MICRO 35), November 2002



• Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay
Se-Hyun Yang, Michael D. Powell, Babak Falsafi, and T. N. Vijaykumar
In Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA 8), Februrary 2002

• Reducing Set-Associative Cache Energy via Selective Direct-Mapping and Way Prediction
Michael D. Powell, Amit Agarwal, T. N. Vijaykumar, Babak Falsafi, and Kaushik Roy
In Proceedings of the International Symposium on Microarchitecture (MICRO 34), December 2001

• An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Peformance I-Caches
Se-Hyun Yang, Michael D. Powell, Babak Falsafi, Kaushik Roy, and T. N. Vijaykumar
In Proceeddings of the International Symposium on High-Peformance Computer Architecture (HPCA 7), January 2001

• Reducing Leakage in a High-Performance Deep-Submicron Instruction Cache
Michael D. Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, and T. N. Vijaykumar
IEEE Transactions on Very Large Scale Integrated Systems (TVLSI), Special Issue on Low Power Electronics and Design, February 2001

• Gated-Vdd: A Circuit Technique to Reduce Leakage in Deep-Submicron Cache Memories
Michael D. Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, and T. N. Vijaykumar
In Proceedings of the International Symposium on Low-Power Electronics and Design (ISLPED), July 2000